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Post by Deleted on Sept 21, 2012 12:11:24 GMT
Sorry Alex, we posted simultaneously.
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Post by Deleted on Sept 21, 2012 12:21:36 GMT
Alex if the v3 already uses the dsd1792 then does/will it accept dsd? Is there any firmware updates? Does MF list dsd support? Allan, the chip itself CAN play DSD, getting it to do so is a different story. If you read my reply to Chong (reply #118) you'll get an idea.
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Post by Deleted on Sept 21, 2012 14:14:21 GMT
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Post by Deleted on Sept 22, 2012 13:46:09 GMT
Hi All taking a quick break from the hard (labour) landscaping ::)and hoping for a nice rainy day tomorrow. breaking hardcore for a concrete base for the shed had me wondering how those first Aussies managed that work day in day out building roads. no wonder they are a tough bunch I'm down for the 2nd GB for this board. looks interesting and plenty of room for experimenting. looking forward to winter when all grinds to a halt. ;D take care
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pagan
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Post by pagan on Sept 22, 2012 14:13:15 GMT
Hi breaking hardcore for a concrete base for the shed had me wondering how those first Aussies managed that work day in day out building roads. take care Generally, whips and chains And they were from ol'blighty
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Post by Deleted on Sept 22, 2012 16:06:24 GMT
Hi breaking hardcore for a concrete base for the shed had me wondering how those first Aussies managed that work day in day out building roads. take care Generally, whips and chains And they were from ol'blighty haaa same as here then had a look round Sydney Jail and the records where a real eye opener. stiff like deported for stealing a rabbit.forming illegal Unions and such like. OK on with the stripey suit and back to the rocks take care
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Post by Deleted on Sept 24, 2012 8:19:40 GMT
For those not going to use external PS, could this be an interesting mod to the Amanero board? -"Looking at the schematics, the input capacitors to the regulators are implemented as per-spec at 1 uF in value. I decided to add a larger capacitors to both of the regulators. I used 100 uF Oscons. For the 3.3v regulator, I added it to the first capacitor in the PI network (C27) which further improves the filtering of the USB power. For the 1.8v regulator, I added the 100 uF capacitor to its input capacitor (C31). The results are very encouraging. No longer do I see a “lingering” low level unlocks. The number of unlocks settles to zero after about one hour. In addition, the number of unlocks decreases at a faster rate than the Musiland, at least in the two tests I’ve done on the Amanero board."- hifiduino.wordpress.com/2012/09/24/adding-input-capacitors-to-the-amanero-board/
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XTRProf
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Post by XTRProf on Sept 24, 2012 10:47:05 GMT
I've found and old pic from Alex's X-DAC V3 modding thread which show clearly how pins 1-3 are left unconnected: with a little zoom (pins 1-3 in red circle): If they left those pins unused it is quite easy to imagine that the firmware has no provision for DSD either. Hmm, with the 1,2,3 pins untapped, is there still any hope there is still a possibility to do DSD from the DSD1792 in the V3 if the Amanero can give command to it thru some firmware in the Amenaro PIC micro controller? If the DSD1792 can't only do until 384-24, so be it. 192-24 will still be very current spec until I move up to a Sabre chip. Obviously, I will not accept any Beta version of any software. Must be tried and tested before worthwhile taking any calculated risk.
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Post by XTRProf on Sept 24, 2012 10:54:53 GMT
Any reason a prefence for Oscon over say a Cerafine? I think you will have a better sound with the ceramic caps removed and bypass with PP caps although it's digital. Come to think of it, with the present SOTA on caps, can do without the PP bypass.
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Post by Deleted on Sept 24, 2012 11:43:55 GMT
Any reason a prefence for Oscon over say a Cerafine? I think you will have a better sound with the ceramic caps removed and bypass with PP caps although it's digital. Come to think of it, with the present SOTA on caps, can do without the PP bypass. You'll have to ask the blogger the reasons why. IIRC Oscons do have a good reputation for that kind of role though.
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pagan
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Post by pagan on Sept 24, 2012 12:04:54 GMT
I always preferred Oscons for digital, but not analogue
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Post by pagan on Sept 24, 2012 12:09:34 GMT
Javier "The results are very encouraging. No longer do I see a “lingering” low level unlocks. The number of unlocks settles to zero after about one hour. In addition, the number of unlocks decreases at a faster rate than the Musiland, at least in the two tests I’ve done on the Amanero board."- "
What dac was it driving?
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Post by Deleted on Sept 24, 2012 12:21:39 GMT
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Post by pagan on Sept 24, 2012 12:31:32 GMT
Generally, whips and chains And they were from ol'blighty haaa same as here then had a look round Sydney Jail and the records where a real eye opener. stiff like deported for stealing a rabbit.forming illegal Unions and such like. OK on with the stripey suit and back to the rocks take care A better place to visit en.wikipedia.org/wiki/Port_Arthur,_Tasmania
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Post by XTRProf on Sept 24, 2012 14:27:04 GMT
Sorry Javier, I thought that was your Amenaro USB. Btw, you guys intend to use what super Vregs for the Amenaro?
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Post by Deleted on Sept 24, 2012 15:52:06 GMT
In order to use an external Vreg either L1 resistor or U2 LDO would have to be removed, have you checked their size? That would still leave the 2nd LDO (U3) to consider and if you get very OCD, maybe be even cut the thraces to the local clocks and feed them their own Vreg? I for one wouldn't dare play with neither, Those gnat poos are way beyond my skills. Besides the default reg is actually quite decent, maybe the bigger caps tweak is enough to achive good enough performance, you can compare it with other well known regs in a table in this link: hifiduino.wordpress.com/2011/03/29/new-breed-of-ultra-low-noise-regulators/Chong, in order to use an external Vreg either L1 resistor or U2 LDO would have to be removed, have you checked their size? That would still leave the 2nd LDO (U3) to consider if you get very OCD, maybe be even cut the thraces to the local clocks and feed them their own Vreg? I for one wouldn't dare play with neither, Those gnat poos are way beyond my skills. Besides the default ADP-150/151 reg at 9uV RMS and 70dB PSRR are actually quite decent, maybe the bigger caps tweak is enough to achive good enough performance, BTW, it is spelt Am anero not Amenaro.
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Post by XTRProf on Sept 25, 2012 1:47:17 GMT
In order to use an external Vreg either L1 resistor or U2 LDO would have to be removed, have you checked their size? That would still leave the 2nd LDO (U3) to consider and if you get very OCD, maybe be even cut the thraces to the local clocks and feed them their own Vreg? I for one wouldn't dare play with neither, Those gnat poos are way beyond my skills. Besides the default reg is actually quite decent, maybe the bigger caps tweak is enough to achive good enough performance, you can compare it with other well known regs in a table in this link: hifiduino.wordpress.com/2011/03/29/new-breed-of-ultra-low-noise-regulators/Chong, in order to use an external Vreg either L1 resistor or U2 LDO would have to be removed, have you checked their size? That would still leave the 2nd LDO (U3) to consider if you get very OCD, maybe be even cut the thraces to the local clocks and feed them their own Vreg? I for one wouldn't dare play with neither, Those gnat poos are way beyond my skills. Besides the default ADP-150/151 reg at 9uV RMS and 70dB PSRR are actually quite decent, maybe the bigger caps tweak is enough to achive good enough performance, BTW, it is spelt Am anero not Amenaro. Actually, just trying to get some ideas what you guys may do. Will do things one stage at a time and stabalise to get use to it so that I can know is there any improvement when changing things again. Also, may not be able to fiit in the space of the V3 after mounting the USB interface into the V3. Yeah, have to consider the heat build up too as I don't want to be in the situation of Chris senior. Anyway, an alternative will be to tap the power off the super regulators that will replace all the 3.3 and 5 VDC Vregs in the V3. Have not changed anything yet due to $$. But take note that all these, the USB part, will only be done when proven to be doable and feasible. Thanks, Amanero ti will be.
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Post by pagan on Sept 25, 2012 7:59:48 GMT
Why is everyone blaming the device that's feeding the Sabre dac? I have a B3 too, and it has it's unlocks. Some days worse than others. Variety of file formats too. And on a variety of sources too. If I try any other dacs I have here, no problems what so ever. If it's because the Sabre's jitter removal feature that makes it so compliant on the source, then it sound like the jitter removal circuit it not removing jitter.
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Post by Deleted on Sept 25, 2012 8:08:47 GMT
Allan, he is running his B-II in async mode and trying to make it work in the "lowest" PLL setting. That requires the lowest possible jitter/phase noise in source. If he changed to "low" or high setting he'll probably get no locks whatsoever. But the lower the PLL the the sound is more accurate, at least theoretically. Running the Buffalo in sync mode doesn't have this problems.
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Post by pagan on Sept 25, 2012 9:41:20 GMT
Javier "But the lower the PLL the the sound is more accurate, at least theoretically."
But isn't that defeating the idea of the de-jitter circuit?
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Post by pagan on Sept 25, 2012 9:52:41 GMT
Javier Have ben thinking of trying the wm8804 receiver as spdif in, i2s out into the sabre.
could try sync or async by using the clock out(of the wm8804) or not.
My B3 is only using the spdif in at present, so async, still drops out every now and then, DPLL setting at medium.
Allan PS dam annoying
PPS async was the suugested setting for the Sabre dac, supposedly for the better ASRC.
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Post by Deleted on Sept 25, 2012 18:00:22 GMT
Javier "But the lower the PLL the the sound is more accurate, at least theoretically." But isn't that defeating the idea of the de-jitter circuit? Allan, IMVHO the less any correction circuit has to work, the better (KISS). If you have a noisy source it makes sense trying to get the best out of it using this de-jitter circuit, but if you have a good enough I2S or DSD source why would you want to risk altering it? It may be a good idea with a good source to defeat the ASRC and may be not so good with a lesser quality source. Javier Have ben thinking of trying the wm8804 receiver as spdif in, i2s out into the sabre. could try sync or async by using the clock out(of the wm8804) or not. My B3 is only using the spdif in at present, so async, still drops out every now and then, DPLL setting at medium. Allan PS dam annoying PPS async was the suugested setting for the Sabre dac, supposedly for the better ASRC. For sync you'll need a 44.1 freq based clock for that family of sampling rates AND another for the family 48KHz. The one in the TPA WM8804 SPDIF board is 12.000 so wouldn't work for neither. ASRC has its pros and its cons, just like anyhting else. Some swear by it, other by intenger oversampling and others even by NOS (Non Over Sampling). What are you using as sources for your B3?
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pagan
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Post by pagan on Sept 26, 2012 9:02:06 GMT
Agree with the KISS idea, and feed a quality source but It shouldn't have dropouts with i2s input. With spdif input on the B3, there are dropouts, there shouldn't be, feeding the same signal into a crappy cs8416 then into dual pcm1794's no dropouts. Admittedly not as resolving in detail, but the wm8804 or DIR9001 is better than the cs. And my dual pcm1794's are standard on-board psu (TP cods). I know using decent power supplies for each component does improve the resolution.
The wm8804 uses the 12Mhz clock for a reference, to recover spdif clock frequency. spdif in i2s out. It's also capable of i2s in and spdif out. I'm yet to try it as a transmitter. Quality of the clock and it's psu will have an impact.
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Post by pagan on Sept 26, 2012 9:43:35 GMT
ASRC has its pros and its cons, just like anyhting else. Some swear by it, other by intenger oversampling and others even by NOS (Non Over Sampling). What are you using as sources for your B3? If you mean upsampling then that's a different story. Do have a src4192 for the 1794's but only up to 24/96, upsampling to 192 does sound right to me, but then that's me. The Sabre oversamples, and with the faster clocks it's able to push the oversampling rate very high (~1.5Mhz IIRC) and the noise for it is way out of audible range... (theoretically I know but it does sound good) NOS or OS? everyone should choose for themselves. But that's mainly for 16/44k1 data on rr dacs (tda1541 ad1862 etc) Havn't seen/heard any sigma delta dac's with no oversampling/filters but it could be the next fad. (probably is the next fad, I just havn't noticed yet) B3 sources tested are music pc with asus d1 feed either optical or coax (coax with Newava 1:1 pulse transformer, blue jeans bnc cable) also beyonwiz DP-P1 (coax or optical)and CD850MK2 with a LClock XO3 (coax or optical)
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Post by Deleted on Sept 26, 2012 13:41:33 GMT
Can I double check the connections please I will initially going into Wills' PK DAC, I2S feed. Inputs are: MCLK, LRCLK, SCLK, DATA, ground to power -ve inlet. So from the Amanero; GND -> POWER -VE INLET FSCLK -> LRCLK BCLK -> SCLK DATA -> DATA ?TIA
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